89) H. Hanafusa, N. Hirose, A. Kasamatsu, T. Mimura, T. Matsui, H. M. H. Chong, H. Mizuta, and Y. Suda, Strain Distribution Analysis of Sputter-Formed Strained Si by Tip-Enhanced Raman Spectroscopy, Appl. Phys. Express 4(2011) 025701.

88) H. Hanafusa, N. Hirose, A. Kasamatsu, T. Mimura, T. Matsui, H. M. H. Chong, H. Mizuta, and Y. Suda, Si/Ge Hole-Tunneling Double-Barrier Resonant Tunneling Diodes Formed on Sputtered Flat Ge Layers, Appl. Phys. Express 4(2011) 024102.

87) H. Hanafusa, N. Hirose, A. Kasamatsu, T. Mimura, T. Matsui, H. M. H. Chong, H. Mizuta, and Y. Suda, Phosphorus Mediated Growth of Ge Layer on Si(001) Substrate, Ext. Abs. of the 2011 Int. Conf. on Solid State Devices and Materials (Nagoya, 2011) pp.1430-1431.

86) Y. Suda, H. Hanafusa, M. Yoshikawa and M. Kanazawa, SiGe Sputter Epitaxy Technique and Its Application to SiGe Devices, Int. Union of Materials Research Soc.(Taiwan, 2011)pp.692(1)-(2)

85) 須田良幸 他、「知識ベース、1-4共鳴トンネルデバイス、1章シリコンナノエレクトロニクス、第2編ナノエレクトロニクス《（電子情報通信学会編、オーム社 2010）pp.12-13.

84) 須田良幸 他、越田信義監修、「ナノシリコンの最新技術と応用展開《（CMC出版、全244ページ、2010）pp. 122-133.

83) Y. Suda, H. Hanafusa, T. Okubo, K. Kunugi, and H. Oohashi, Si1-xGex GS-MBE and Sputter Epitaxy Techniques and Their Application to Devices eith Low Dimensional Structures, 5th Int. Workshop on New Group IV Semiconductor Nanoelectronics (Sendai, 2010) pp. 7-8.

82) H. Hanafusa, M. E. Schmidt, H. M. H. Chong, H. Mizuta, and Y. Suda, Nano-Scale Strain Measurement by Tip Enhanced Raman Spectroscopy, International Symposium on Atom-scale Silicon Hybrid Nanotechnologies for ‘More than-Moore’ & ‘Beyond CMOS’ Era (Southampton, 2010)

81) H. Hanafusa, N. Hirose, A. Kasamatsu, T. Mimura, T. Matsui, H. M. H. Chong, H. Mizuta, and Y. Suda, Strained Si with Smooth and Uniformly Strained Surface Formed by Sputter Epitaxy, Ext. Abs. of the 2010 Int. Conf. on Solid State Devices and Materials (Tokyo, 2010) pp.185-186.

80) H. Hanafusa, Y. Suda, N. Hirose, A. Kasamatsu, T. Mimura, and T. Matsui, Crystalline Ge Layer Growth on Si(001) by Sputter Epitaxy Method, Book of 1st Int. Workshop on Si based Nano-electronics and –photonics eds by S. Chiussi, P. Alpuim, J. Murota, P. González, J. Serra, and B. León (Netbiblo, Spain, 2009)pp.137-138.

79) 江木啓訓、 須田良幸、東京農工大学におけるeラーニング教育支援環境の構築, 東京農工大学大学教育ジャーナル、 4 (2008) pp.35-45.

78) Y. Suda, M. Shouji, and K. Takada,
SiOx/3C-SiC/Si MIS Nonvolatile Resistance Memory, Appl. Phys. Express, 1 (2008) p. 071401.

77) H. Hanafusa and Y. Suda,
Room-Temperature Operated Si/Si1-xGex Hole-Tunneling Symmetrical Double-Quantum-Well RTD Formed by Sputter Epitaxy, 3rd Int. SiGe Technology and Device Meeting (Taiwan, 2008) pp. 183-184.

76) Y. Yamaguchi, H. Hasegawa, and Y. Suda,
SiO2/SiOx/3C-SiC/n-Si(001) Nonvolatile Resistance Memory Formed with One-Stage Oxidation Process,No. 2117,Abs. 214th ECS PRiME 2008 Meeting (The Electrochemical Society, Hawaii, 2008).

75) Y. Suda, H. Hanafusa and T. Okubo,
Si1-xGex Epitaxy Techniques and Their Application to Low Dimensional Devices, 4th Int. Workshop on New Group IV Semiconductor Nanoelectronics (Sendai, 2008) pp. 73-74.

74) H. Hanafusa, Y. Suda, A. Kasamatsu, N. Hirose, T. Mimura, and T. Matsui,
Strain-Relaxed Si1-xGex and Strained Si Grown by Sputter Epitaxy, Jpn. J. Appl. Phys., 47 (2007) pp. 3020-3023.

73) H. Maekawa, Y. Sano, C. Ueno, and Y. Suda,
High Current Density and High PVCR Si/Si1-xGex DQW RTD Formed with Quadruple-Layer Buffer, J. Crystal Growth, 301-302 (2007) pp. 1017-1020.

72) Y. Suda, T. Yoichi, M. Hirata, H. Hanafusa, H. Ohashi, N. Hirose, and T. Matsui
Artificially-Positioned Ge Dot Array Formed by Sputter Epitaxy, Ext. Abs. 5th Int. Sym. On Control of Semiconductor Interface (The Japan Society of Applied Physics, Hachioji, Japan, 2007) pp. 83-84.

71) Y. Suda, H. Maekawa, N. Asaoka, and M. Suhara
Room Temperature Oscillation in Si/Si1-xGex Resonant Tunneling Diode, Ext. Abs. 2007 Int. Conf. on Solid State Devices and Materials (Tsukuba, 2007) pp. 216-217.

70) H. Hanafusa, Y. Suda, A. Kasamatsu, N. Hirose, T. Mimura, and T. Matsui
Strain-Relaxed Si1-xGex and Strained Si Grown by Sputter Epitaxy, Ext. Abs. 2007 Int. Conf. on Solid State Devices and Materials (Tsukuba, 2007) pp. 292-293.

69) Maekawa, Y. Sano, A. Meguro, and Y. Suda
Strain-Relieving Mechanisms of Thin Double- and Triple-Layer Buffers, Jpn. J. Appl. Phys. Lett., 45 (2006) pp. L1247 - L1249.

68) H. Maekawa, Y. Sano, C. Ueno, and Y. Suda
High Current Density and High PVCR Si/Si1-xGex DQW RTD Formed with Quadruple-Layer Buffer, J. Crystal Growth 301-302 (2006) pp. 1017-1020.

67) H. Maekawa, Y. Sano, C. Ueno, and Y. Suda
High Current Density and High PVCR Si/Si1-xGex DQW RTD Formed with Quadruple-Layer Buffer, 14th Int. Conf. MBE (Tokyo, 2006) pp. 164-165.

66) H. Maekawa, Y. Sano, and Y. Suda
High-PVCR Si/Si1-xGex Planer-Type Resonant Tunneling Diode Formed with Phosphorous doped Quadruple-layer Buffer, Ext. Abs. 2006 Int. Conf. on Solid State Devices and Materials (Tokyo, 2006) pp. 808-809.

65) J. Kubota, A. Hashimoto, and Y. Suda
Si1-xGex Sputter Epitaxy Technique and Its Applications to RTD, Thin Solid Films, 508, pp. 203-206 (2006).

64) D. Kitayama, T. Yoichi, and Y. Suda
Artificially-Positioned Multiply-Stacked Ge Dot Array, Thin Solid Films, 508, pp. 20-23 (2006).

63) Y. Suda, H. Hanafusa, T. Kobayashi, Y. Takahashi, and H. Maekawa
SiGe Sputter Epitaxy and Its Application to Quantum Effect Devices, 2nd Int. Workshop on New Group IV Semiconductor Nanoelectronics (Sendai, 2006) pp. 89-90.

62) H. Maekawa, Y. Sano, C. Ueno, and Y. Suda
Electron Tunneling SiGe RTD with Enhanced Current Density Formed Using Quadruple-Layer Buffer, IEEJ Trans. EIS, 126, pp. 1088-1092 (2006).

61) D. Kitayama, T. Yoichi, Y. Suda
"Artificially positioned multiply-stacked Ge dot array", 4'th Int. Conf. on Silicon Epitaxy and Heterostructures (Awaji, 2005) pp. 50-51.

60) J. Kubota, A. Hashimoto, Y. Suda
"Si1-xGex sputter epitaxy technique and its application to RTD", 4'th Int. Conf. on Silicon Epitaxy and Heterostructures (Awaji, 2005) pp. 180-181.

59) J. Kubota, A. Hashimoto, and Y. Suda
Relaxztion Behavior of Sputter Epitaxy Si1-xGex Film on P-Type Si(001) and NDR Observetion from Hole-Tunneling RTD at RT, Ext. Abs. 2005 Int. Conf. on Solid State Devices and Materials (The Japan Society of Applied Physics, Kobe, 2005) pp. 158-159.

58) H. Maekawa, M. Shoji, and Y. Suda
High PVCR Si/Si1-xGex DW RTD Formed with New Triple-Layer Buffer, Materials Science in Semiconductor Processing, 8, pp.417-421 (2004).

57) 須田良幸　他
「実験化学講座　第27巻　機能性材料《　(日本化学会, 丸善, 全465頁, 2004) pp. 68-79.

56) D. Kitayama, T. Yoshizawa and Y. Suda
Ge Dot Array Formation Using Small Convex Position Anchors, Jpn. J. Appl. Phys. 43, pp. 3822-3824 (2004).

55) Y. Suda, S. Kaechi, D. Kitayama and T. Yoshizawa
Artificially Size- and Position-Controlled Ge Dot Formation Using Patterned Si, Thin Solid Films, 464-465, pp. 190-193 (2004).

54) H. Maekawa, M. Shoji and Y. Suda
High PVCR Si/Si1-xGex DW RTD Formed with New Triple-Layer Buffer, Proc. 2nd Int. SiGe Technology and Device Meeting (BBW & ZAB, Frankfurt(Oder), 2004) pp.21-22.

53) H. Maekawa, Y. Sano and Y. Suda
Strain-Relief Mechanisms of Stepwise Ge composition Multilayer Buffers and High PVCR Si/Si1-xGex ASDQW RTD Formed with Triple-Layer Buffer , Ext. Abs. 2004 Int. Conf. on Solid State Devices and Materials (The Japan Society of Applied Physics, Tokyo, 2004) pp. 598-599.

52) J. Kubota, A. Hashimoto, Y. Suda
Electron-Tunneling Si/Si1-xGex RTD Fabricated by New Sputter Epitaxy, Proc. 3rd Int. Workshop on New Group IV Semiconductiors (MEXT & RIEC, Sendai, 2004) p.81.

51)　S. Kaechi, D. Kitayama, and Y. Suda
Migration-induced Ge dot formation, Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Tokyo, 2003) pp. 96-97..

50) Y. Suda and K. Miki
Si Atomic Layer Epitaxy from Thermally Cracked Si2H6 (TCH-ALE) and the Mechanisms of the Adsorption Process, 1st Int. SiGe Technology and Device Meeting (CRAST & RIEC, nagoya, 2003) pp.232-233.

49) Y. Suda, H. Tanaka, and M. Sekiguchi
New Cu Fine Line Direct Drawing Method Using a STM-Electroplating Combination System, 10th Int. Colloquium on Scanning Probe Microscopy (The Japan Society of Applied Physics, Hawaii, 2002) p.59; Jpn. J. Appl. Phys. 42, pp.4887-4889 (2003).

48) Y. Suda, N. Hosoya, and K. Miki
Si Submonolayer and Monolayer Digital Growth Operation Technique Using Si2H6 as Atomically Controlled Growth Nanotechnology, 4th Int. Symp. on Control of Semiconductor Interfaces (Karuizawa, 2002) p.6-5; Appl. Surf. Sci., 216, pp.424-430 (2003).

47) M. Yamamura and Y. Suda
Novel Single Electron Logic Circuits Using Charge-Induced Signal Transmission (CIST) Structufres, IEEE Trans. on Nanotechnology, 2, pp.1-10 (2002).

46) Y. Suda, A. Meguro, and H. Maekawa
High PVCR Si1-xGex/Si Electron-Tunneling RTD Using Multiple-Well and Annealed Thin Double-Layer Buffer, 2nd ECS Int. Semiconductor Technology Conf (The Electrochemical Society, 2002 ); PV2002, pp.118-127 (2002).

45) N. Hosoya, K. Miki, and Y. Suda
Ordered 1x1 SiH2 Monolayer Adsorption on Si(001) from Cracked Si2H6 and Its Application to ALE Growth Operation, Ext. Abs. Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Nagoya, 2002) pp.488-489.

44) Y. Suda
Si1-xGex/Si Triple Barrier RTD with a High Peak-to-Valley Ratio of ≧ 180 at RT, Advanced Luminescent Display and Quantum Confinement, ECS 201st Int. Meeting (The Electrochemical Society, 2002); PV2002-9, pp.47-60 (2002).

43) Y. Suda, N. Hosoya, and D. Shiratori
New Si Atomic-Layer-Controlled Growth Technique with Thermally-Cracked Hydride Molecule, J. Cryst. Growth, 237-239 (2002) pp. 500-505.

42) Y. Suda and H. Koyama
Electron Resonant Tunneling with a High Peak-to-Valley Ratio at Room Temperature in Si1-xGex/Si Triple Barrier Diodes, Appl. Phys. Lett. 79, pp.2273-2275 (2001).

41) S. Yamaguchi, A. Meguro, and Y. Suda
Si1-xGex/Si Triple-Barrier RTD with a Peak-to-Valley Ratio of ≧ 180 at RT Formed Using an Annealed Thin Multilayer Buffer, Ext. Abs. Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Tokyo, 2001) pp.582-583.

40) Y. Suda, S. Kaechi, and T. Date
Electroluminescence Behavior of a Shcottky-Type Asymmetric Si1-xGex/Si DQW Diode, 1'st Int. Workshop on New Group IV (Si-Ge-C) Semiconductors (The Ministry of Education, Science, Sports and Culture, Sendai, 2001) VI-02.

39) N, Hosoya, S. Daiju, and Y. Suda
New Approach for Si Atomic-Layer-Controlled Growth Method Using Thermally-Cracked Hydride Molecule , 1'st Int. Workshop on New Group IV (Si-Ge-C) Semiconductors (The Ministry of Education, Science, Sports and Culture, Sendai, 2001) VI-16

38) K. Yamamura, R. Sato, and Y. Suda
Room-Temperature Gate Moduration of Al Thin-Film Single-Electron Transistor, Abs. Si Nanoelectronics Workshop (The Japan Society of Applied Physics and IEEE Electron Device Society, Kyoto, 2001) pp.62-63

37) Y. Suda, N. Shiotani, K. Imure, K. Hirohashi, and K. Yamamura
Single-Electron Multiple-Valued Base-n Full Adder Circuit Using a Bunch of Electrons as a Unit Logic Value, Abs. Si Nanoelectronics Workshop (The Japan Society of Applied Physics and IEEE Electron Device Society, Kyoto, 2001) pp.32-33

36) Y. Suda and N. Hosoya
New Si Atomic-Layer-Controlled Growth Technique with Thermally-Cracked Hydride Molecule, 13th Int. Conf. on Crystal Growth (The Japan Society of Applied Physics, Kyoto, 2001) p.584.

35) A. Kumagai, Y. Kanegawa, Y. Suda, and N. Koshida
Improvement of Porous Si Luminescence Intensity Durability by Nitrogen Ion Irradiation Using an ECR Ion Source, Journal of Porous Materials, 7, pp.73-76 (2000).

34) K. Yamamura and Y. Suda
Bidirectional Signal Transmission Circuit Using Single Electron Tunneling Junctions, Jpn. J. Appl. Phys., 38, pp.2462-2465 (1999).

33) Y. Suda, Y. Misato, and D. Shiratori
Si Atomic-Layer-Epitaxy Using Thermally-Cracked-Si2H6, Jpn. J. Appl. Phys., 38, pp.2390-2392 (1999).

32) K. Yamamura and Y. Suda
A Novel Single Electron Logic Circuit Using Signal Transmission Structure, Abs. Si Nanoelectronics Workshop (The Japan Society of Applied Physics and IEEE Electron Device Society, Kyoto, 1999) pp.44-45.

31) K. Yamamura and Y. Suda
Novel Single Electron Logic Circuit Family Constructed with Signal Transmission Structures, Ext. Abs. Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Tokyo, 1999) pp.84-85.

30) K. Takada, M. Fukumoto, and Y. Suda
Memory Function of a SiO2/β-SiC MIS Diode, Ext. Abs. Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Tokyo, 1999) pp.132-133.

29) Y. Suda, K. Obata, and N. Koshida
Observation of Band Dispersions in Photoluminescenct Porous Si, Phys. Rev. Lett., 80, pp.3559-3562 (1998).

28) K. Yamamura and Y. Suda
Three-Valued Single-Electron Memory Array with Reading Circuits, Jpn. J. Appl. Phys., 37, pp.L1440-L1443 (1998).

27) Y. Suda, Y. Misato, D. Shiratori, K. Oryu, and M. Yamashita
Saturation Adsorption Reaction of Cracked Si2H6 on Si(001) and Ge(001), Appl. Surf. Sci., 130-132, pp.304-309 (1998).

26) K. Yamamura and Y. Suda
Improvement of Operation Reliability at Room Temperature for a Single Electron Pump, IEICE Trans. Electron., E81-C, pp16-20 (1998).

25) A. Kumagai, Y. Kanegawa, Y. Suda, and N. Koshida
Improvement of Porous Si Luminescence Intensity Durability by Nitrogen Ion Irradiation Using an ECR Ion Source, Porous Semiconductors-Science and Technology (Mallorca, Spain, 1998).

24) Y. Suda, Y. Misato, and D. Shiratori
Si Atomic-Layer-Epitaxy Using Thermally-Cracked-Si2H6, Ext. Abs. Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Hiroshima, 1998) pp.422-423.

23) H. Koyama and Y. Suda
Double-Quantum-Well Si1-xGex/Si Electron Resonant Tunneling Diode with a High Peak-to-Valley Ratio at RT, Ext. Abs. Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Hiroshima, 1998) pp.412-413.

22) K. Yamamura and Y. Suda
Single Transmission Circuit Using Single Electron Tunneling Junctions, Ext. Abs. Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Hiroshima, 1998) pp.194-195.

21) Y. Suda
Migration-Assisted Si Sub-Atomic-Layer Epitaxy from Si2H6, J. Vac. Sci. Technol., A15, pp. 2463-2468 (1997).

20) H. Kanda, A. Ono, Y. Suda, and K. Era
Growth Surface Dependence of Cathodoluminescence of Cubic Boron Nitride, Materials Science Forum, 258-263, pp.1265-1274 (1997).

19) Y. Suda, K. Obata, A. kumagai, and N. Koshida
Roles of Surface Termination in Photoluminescence Mechanisms of Porous Si, Mater. Res. Soc. Proc., 452, pp.455-460 (1997).

18) K. Yamamura and Y. Suda
Single Electron Three-Valued Memory Array with Reading Circuits, Ext. Abs. Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Hamamatsu, 1997) pp.492-493.

17) K. Yamamura and Y. Suda
A 3-valued Memory Array Using a Novel Serially Connected Junction-Capacitor-Junction Single Electron Memory Cell, Abs. Si Nanoelectronics Workshop (IEEE Electron Device Society, Kyoto, 1997) pp.28-29.

16) H. Kanda, A. Ono, Y. Suda and K. Era
Growth Surface Dependence of Cathodoluminescence of Cubic Boron Nitride, Proc. Int. Conf. Defects in Semiconductors 1997, ICDS-19 (Aveiro, Portugal, July, 1997)

15) Y. Suda, Y. Misato, K. Oryu, and M. Yamashita
Saturatioin Adsorption Reactiion of Cracked Si2H6 onSi(001) and Ge(001), 4'th Int. Symp. Atomically Controlled Surfaces and Interfaces (ACSI-4) (The Japan Society of Applied Physics, Tokyo, 1997) pp.321-322.

14) Y. Suda, M. Ishida, and M. Yamashita
Ar+-Laser Assisted Sub-Atomic-Layer Epiyaxy of Si, J. Crystal. Growth, 169, pp.672-680 (1996).

13) Y. Suda, T. Koizumi, K. Obata, Y. Tezuka. S. Shin, and N. Koshida
Surface Electronic Structures and Photoluminescence Mechanisms of Porous Si, J. Electrochem. Soc., 143, pp.2502-2507 (1996).

12) M. Ishida, M. Yamashita, Y. Nagata, and Y. Suda
Growth Temperature Window and Self-Limiting Process in Sub-Atomic-Layer Epitaxy, Jpn. J. Appl. Phys., 35, pp.4011-4015 (1996).

11) T. Koizumi, K. Obata, Y. Tezuka, S. Shin, N. Koshida, and Y. Suda
Effects of Oxidation on Electronic States and Photoluminescence Properties of Porous Si, Jpn. J. Appl. Phys. 35, pp.L803-L806 (1996).

10) Y. Suda
Mechanisms and Growth Characteristics of Si Sub-Atomic-Layer Epitaxy from Si2H6 , Ext. Abs. Int. Conf. Solid State Devices and Materials (The Japan Society of Applied Physics, Tokyo, 1996) pp.682-684.

9) Y. Suda, Y. Tezuka, S.Shin, and N. Koshida
Surface Structures and Photoluminescence Mechanisms of Porous Si, Proceedings Int. Symp. on Advanced Luminescent Materials (The Electrochemical Society, Pennington, NJ, 1996) p.268-277.

8) S. Shin, A. Agui, M. Fujisawa, Y. Tezuka, T. Ishii, Y. Minagawa, Y. Suda, A. Ebina, O. Mishima, and K. Era
Resonant Photoemission Studies of Boron 1s Exciton and Band Structures in Cubic BN, Phys. Rev., B52, pp.11853-11858 (1995).

7) S. Shin, Y. Tezuka, T. Kinoshita, T. Ishii, T. Kashiwakura, M. Takahashi, and Y. Suda
Photoemission Study of the Spectral Function of V2O3 in Relation to the Recent Quantumn Monte Carlo Study, J. Phys. Soc. Jpn., 64, pp.1230-1235 (1995).

6) Y. Suda and N. Koshida
Surface Structures and Photoluminescence Mechanisms of Porous Si, Denki Kagaku, 63, pp.892-897 (1995).

5) Y. Suda, M. Ishida and M. Yamashita
Surface-Migration-Assisted Sub-Atomic-Layer Epitaxy of Si, Abs. 13th Int. Vacuum Congress/ 9th Int. Conf. on Solid Surfaces (The Vacuum Society Japan, Yokohama, 1995) p.84.

4) T. Ban, T. Koizumi, S. Haba, N. Koshida, and Y. Suda
Effects of Anodization Current Density on the Photoluminescence Properties of Porous Si, Jpn. J. Appl. Phys., 33, pp.5603-5607 (1994).

3) Y. Suda, M. Shirahama, and M. Ishida
Sub-Atomic-Layer Epitaxy of Si Using Si2H6 , Trans. Mat. Res. Soc. Jpn., 19A, pp.149-152 (1994).

2) Y. Suda, M. Ishida, M. Yamashita, H. Ikeda
Sub-Atomic-Layer Epitaxy of Si Using Si2H6 , Appl. Surf. Sci., 82/83, pp.332-337 (1994).

1) Y. Suda, T. Ban, T. Koizumi, H. Koyama,Y. Tezuka, S.Shin, and N. Koshida
Surface Structures and Photoluminescence Mechanisms of Porous Si, Jpn. J. Appl. Phys. 33, pp.581-585 (1994).